-----------------------MAKEFILE-----------------------------
A Makefile basically consists of :
1) Definitions of variables and functions,
example: myshell=bash
2) Commensts:
e.g. # converting postscript to pdf or what ever
3) Includes:
e.g.- include Makefile.local
4) Rules:
e.g. - %.pdf: %.ps; -@ps2pdf $<
-------------------------
**)Mind the tab key (<tab>) prefacing the commands past the fist line.
**)Use a semicolon to stuff muiltiple commands into one single lin, or a backslash to join split lines. (Refer Makefile1)
NOTE::
I. The at-sign (@) in front of the commnad prevents make from announcing the commands it's going to do.
II. If you don't tell make a target, it will simply do the first rule.
III. If you tell make multiple targets, it will do them all in order.
------------------------------------------------------------------
We can Combine multiple makefiles:
command in makefile(-include m/Makefile-l)
When make encounters an include-command, it will stop processing the current Makefile, read the included Makefile and then continue where it left off.
-----------------------------------------------------------
If we define a target socks twice it will give the warning mesage
Example:
socks: ; @echo get into left sock
socks: ; @echo get inot right sock
***While make it will give the warning messages z`
***For remove the warning message we have to duplicate the colon:
socks:: ; @echo get into left sock
socks:: ; @echo get inot right sock
*** Now When we make this it will not give the error
Imp Note:
CXXSOURCES = basic_sample.cpp # list of source files
CXXOBJECTS = $(CXXSOURCES:.cpp=.o) # expands to list of object files
-----------------------------------Built-in fuctions------------------------------
1) $(subst from,to,text) Replace from with to in text.
2) $(patsubst pattern,replacement,text) Replace words matching pattern with replacement in text.
3) $(strip string) Remove excess whitespace characters from string.
4) $(findstring find,text) Locate find in text.
5) $(filter pattern...,text) Select words in text that match one of the pattern words.
6) $(filter-out pattern...,text) Select words in text that do not match any of the pattern words.
7) $(sort list) Sort the words in list lexicographically, removing duplicates.
8) $(dir names...) Extract the directory part of each file name.
9) $(notdir names...) Extract the non-directory part of each file name.
10) $(suffix names...) Extract the suffix (the last dot and following characters) of each file name.
11) $(basename names...) Extract the base name (name without suffix) of each file name.
12) $(addsuffix suffix,names...) Append suffix to each word in names.
13) $(addprefix prefix,names...) Prepend prefix to each word in names.
14) $(join list1,list2) Join two parallel lists of words.
15) $(word n,text) Extract the nth word (one-origin) of text.
16) $(words text) Count the number of words in text.
17) $(wordlist s,e,text) Returns the list of words in text from s to e.
18) $(firstword names...) Extract the first word of names.
19) $(wildcard pattern...) Find file names matching a shell file name pattern (not a `%' pattern).
20) $(error text...) When this function is evaluated, make generates a fatal error with the message text.
21) $(warning text...) When this function is evaluated, make generates a warning with the message text.
22) $(shell command) Execute a shell command and return its output.
23) $(origin variable) Return a string describing how the make variable variable was defined.
24) $(foreach var,words,text) Evaluate text with var bound to each word in words, and concatenate the results.
25) $(call var,param,...) Evaluate the variable var replacing any references to $(1),$(2) with the first, second, etc. param values.
-----------------------------------Automatic Variable----------------------------------
$@ The name of the target.
$% The target member name, when the target is an archive member.
$< The name of the first (or only) prerequisite.
$? The names of all the prerequisites that are newer than the target, with spaces between them.
$^ $+ The names of all the prerequisites, with spaces between them. The value of $^ omits duplicate prerequisites, while $+ retains them and preserves their order.
$* The stem with which an implicit rule matches.
$(@D)
$(@F) The directory part and the file-within-directory part of $@
$(*D)
$(*F) The directory part and the file-within-directory part of $*
$(%D)
$(%F) The directory part and the file-within-directory part of $%
$(<D)
$(<F) The directory part and the file-within-directory part of $<
$(^D)
$(^F) The directory part and the file-within-directory part of $^
$(+D)
$(+F) The directory part and the file-within-directory part of $+
$(?D)
$(?F) The directory part and the file-within-directory part of $?
A Makefile basically consists of :
1) Definitions of variables and functions,
example: myshell=bash
2) Commensts:
e.g. # converting postscript to pdf or what ever
3) Includes:
e.g.- include Makefile.local
4) Rules:
e.g. - %.pdf: %.ps; -@ps2pdf $<
-------------------------
**)Mind the tab key (<tab>) prefacing the commands past the fist line.
**)Use a semicolon to stuff muiltiple commands into one single lin, or a backslash to join split lines. (Refer Makefile1)
NOTE::
I. The at-sign (@) in front of the commnad prevents make from announcing the commands it's going to do.
II. If you don't tell make a target, it will simply do the first rule.
III. If you tell make multiple targets, it will do them all in order.
------------------------------------------------------------------
We can Combine multiple makefiles:
command in makefile(-include m/Makefile-l)
When make encounters an include-command, it will stop processing the current Makefile, read the included Makefile and then continue where it left off.
-----------------------------------------------------------
If we define a target socks twice it will give the warning mesage
Example:
socks: ; @echo get into left sock
socks: ; @echo get inot right sock
***While make it will give the warning messages z`
***For remove the warning message we have to duplicate the colon:
socks:: ; @echo get into left sock
socks:: ; @echo get inot right sock
*** Now When we make this it will not give the error
Imp Note:
CXXSOURCES = basic_sample.cpp # list of source files
CXXOBJECTS = $(CXXSOURCES:.cpp=.o) # expands to list of object files
-----------------------------------Built-in fuctions------------------------------
1) $(subst from,to,text) Replace from with to in text.
2) $(patsubst pattern,replacement,text) Replace words matching pattern with replacement in text.
3) $(strip string) Remove excess whitespace characters from string.
4) $(findstring find,text) Locate find in text.
5) $(filter pattern...,text) Select words in text that match one of the pattern words.
6) $(filter-out pattern...,text) Select words in text that do not match any of the pattern words.
7) $(sort list) Sort the words in list lexicographically, removing duplicates.
8) $(dir names...) Extract the directory part of each file name.
9) $(notdir names...) Extract the non-directory part of each file name.
10) $(suffix names...) Extract the suffix (the last dot and following characters) of each file name.
11) $(basename names...) Extract the base name (name without suffix) of each file name.
12) $(addsuffix suffix,names...) Append suffix to each word in names.
13) $(addprefix prefix,names...) Prepend prefix to each word in names.
14) $(join list1,list2) Join two parallel lists of words.
15) $(word n,text) Extract the nth word (one-origin) of text.
16) $(words text) Count the number of words in text.
17) $(wordlist s,e,text) Returns the list of words in text from s to e.
18) $(firstword names...) Extract the first word of names.
19) $(wildcard pattern...) Find file names matching a shell file name pattern (not a `%' pattern).
20) $(error text...) When this function is evaluated, make generates a fatal error with the message text.
21) $(warning text...) When this function is evaluated, make generates a warning with the message text.
22) $(shell command) Execute a shell command and return its output.
23) $(origin variable) Return a string describing how the make variable variable was defined.
24) $(foreach var,words,text) Evaluate text with var bound to each word in words, and concatenate the results.
25) $(call var,param,...) Evaluate the variable var replacing any references to $(1),$(2) with the first, second, etc. param values.
-----------------------------------Automatic Variable----------------------------------
$@ The name of the target.
$% The target member name, when the target is an archive member.
$< The name of the first (or only) prerequisite.
$? The names of all the prerequisites that are newer than the target, with spaces between them.
$^ $+ The names of all the prerequisites, with spaces between them. The value of $^ omits duplicate prerequisites, while $+ retains them and preserves their order.
$* The stem with which an implicit rule matches.
$(@D)
$(@F) The directory part and the file-within-directory part of $@
$(*D)
$(*F) The directory part and the file-within-directory part of $*
$(%D)
$(%F) The directory part and the file-within-directory part of $%
$(<D)
$(<F) The directory part and the file-within-directory part of $<
$(^D)
$(^F) The directory part and the file-within-directory part of $^
$(+D)
$(+F) The directory part and the file-within-directory part of $+
$(?D)
$(?F) The directory part and the file-within-directory part of $?
